READING, United Kindom, Dec. 7, 2001 (PRIMEZONE) -- Siroyan, the high-performance DSP IP company, today takes the wraps off the first silicon implementation of its OneDSP architecture. The chip, which is the first system-on-chip (SoC) design based on OneDSP, implements a 2-cluster version of the company's innovative processor architecture, announced in October. Although designed as a test mule, the chip offers DSP performance of up to 800 MMACs at 200MHz, a level that exceeds or is equivalent to the peak performance of currently marketed products.
Designated SRU322, the test chip is a complete SoC design for use as a demonstration hardware-development platform, enabling licensees and partners to benchmark application code and model APB peripherals in an FPGA. The SRU322 RTL will also be made available to licensees as an example SoC implementation. Silicon for the SRU322 was fabricated by UMC in 0.15(micron)m technology, and the test chip assembled by Atlantic Technology at its facility in Crumlin, South Wales.
The SRU322 implements a 2-cluster version of the company's SRA328 soft core, together with a set of peripherals, a 16K instruction cache, a 16K data cache, a 4K VLIW cache, 16K of cluster memory and 64K of SRAM. This version deploys just one master, and one slave execution-unit cluster to provide the high level of performance required for a next-generation design, such as a personal communicator offering real-time video and an "always-on" connection. The SRA328 core can be further scaled to a maximum of 8 clusters, to provide DSP performance of up to 3200 MMACs.
"OneDSP offers our licensees an important step in the migration from today's simple voice phones with limited data capacity, through the next generation of data-enabled, multi-media wireless terminals and beyond," said Adrian Wise, chief technology officer at Siroyan. "By deploying Siroyan's DSP IP, designers now have the core technology building block to help realize the next generation of products."
According to Gartner Group predictions, there will be some 1.8 billion worldwide cellular subscribers by the end of 2006. Over 50% of these subscribers will be using 2.5G or 3G technologies for mobile multi-media services such as personalised infotainment, multi-media messaging, m-commerce and web access.
Availability
The OneDSP architecture is delivered as a synthesizable core in RTL and is supported in a standard EDA development environment. The first core, designated SRA328, can be configured with up to 8 execution-unit clusters with 32-bit data-paths, and includes an integrated AMBA(tm) bus, debug port and DMA. The fully qualified SRA328 soft core, together with the OneDSP C-Compiler and tool chain, will be available to customers in Q2 2002 and will offer a peak performance of up to 12.8 billion operations per second. Siroyan's road map for future generations includes further derivatives, such as floating-point, in 2003, and families supporting up to 16- and 32-clusters with 64-bit datapaths for 2004.
Background
Siroyan's OneDSP architecture delivers unmatched scalable DSP performance through the application of unique clustering techniques to supply the next-generation processing power for SoC designers working on demanding convergent communications and consumer applications. Providing up to 32 execution-unit clusters, which can be implemented as required by the licensee, it enables the designer to select the performance, cost and power consumption parameters that are best suited to each design.
About Siroyan
Siroyan Limited's vision of becoming the industry-standard DSP IP supplier began with the OneDSP program in 1999, following an intensive research study. This two-year program, involving over 800 design engineers in 150 different companies, ascertained the architecture and IP delivery model the company needed to take technology design to the next level of performance. The OneDSP architecture is the first to use clustering techniques to provide unparalleled, scalable DSP power. Delivered as a family of synthesizable cores specifically for SoC deployment, and supported in a standard EDA development environment, Siroyan offers designers the performance and flexibility required for demanding next-generation applications. Headquartered in Reading, UK, the company is privately owned, and employs some 50 technical and commercial staff at its HQ and Design Centres. More information is available at: www.siroyan.com.
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