STATS ChipPAC's Copper Wirebond Shipments Exceed One Billion Units

SINGAPORE -- 19/06/2012, UNITED STATES--(Marketwire - Jun 18, 2012) - STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP), a leading semiconductor test and advanced packaging service provider, today announced that it has reached the production milestone of one billion copper wirebond units shipped. This achievement was driven by the Company's proven high volume manufacturing capabilities combined with STATS ChipPAC's engineering focus on copper wire technology development for a broad range of advanced, multi-die laminate and leaded packages including three dimensional (3D) packaging.

"We have reached a number of technology and manufacturing achievements in our copper wire packaging roadmap that have enabled us to serve the needs of our diverse customer base and support the acceleration of our copper wire program as more and more customers experience the benefits and reliability of copper wire interconnect as an alternative to gold. Today, we are actively qualifying and ramping to production a wide range of advanced multi-die laminate and leaded packages as well as thermally enhanced mold compounds compatible with copper wire to further increase thermal performance. We are in volume production with copper wirebond devices down to the 40 nanometer (nm) silicon wafer node and are qualified on the 28nm wafer node," said Wan Choong Hoe, Executive Vice President and Chief Operating Officer, STATS ChipPAC.

Copper wire provides better conductivity than gold, improved electrical and thermal performance, and stronger mechanical properties. With the semiconductor industry trend moving towards higher pin counts, finer bond pad pitches and thinner wire diameters, there is a growing demand to utilize copper wire in more advanced multi-die laminate and leaded packages including three dimensional (3D) packaging. STATS ChipPAC's copper wire offering is rapidly expanding with wire diameters down to 0.6 millimeters and a broad technology offering including die-to-die bonding and a range of 3D package configurations including stacked die, side-by-side die and a combination of stacked plus side-by-side die packages.

Cost reduction is a primary driver for the industry's conversion to copper wire. In addition to its technology achievements, STATS ChipPAC has focused on material and process enhancements such as Palladium (Pd) coated wire and ultra high density substrates to drive cost reduction and enable customers to realize the full benefits of copper wire interconnect. Copper wire with Palladium (Pd) coating provides a cost-effective, reliable interconnection with higher production yields and a process that will not damage the delicate bond pads in more advanced devices. Palladium coated wire is one of STATS ChipPAC's core technologies in its copper wirebond offering. In the area of manufacturing process enhancements, STATS ChipPAC is qualifying copper wirebond interconnect on ultra high density strips for both leaded and laminate packages to provide customers with an even more cost efficient copper wire solution.

"The one billionth copper wire production unit is an important milestone for STATS ChipPAC and our copper wire customers. We are pleased to support our customers with a robust, cost effective solution that offers yield, quality and reliability equal to or better than gold. The proven reliability and continuous development of our copper wirebond manufacturing process has resulted in more customers partnering with STATS ChipPAC as they transition to copper wire interconnect across a wide range of devices and packaging technologies in mobile, consumer and computing applications," said Hal Lasky, Executive Vice President and Chief Sales Officer, STATS ChipPAC.

Forward-Looking Statements
Certain statements in this release are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, the timing and impact of the expected closure of the Thailand Plant as well as the estimated associated cost for the closure; the amount of the property damage and business interruption insurance claim due to flooding of the Thailand Plant; the ability to shift production to other manufacturing locations, shortages in supply of key components and disruption in supply chain; general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilisation; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or cancelling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; classification of our Company as a passive foreign investment company; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; majority ownership by Temasek Holdings (Private) Limited ("Temasek") that may result in conflicting interests with Temasek and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; labour union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; the continued trading and listing of our ordinary shares on the Singapore Exchange Securities Trading Limited ("SGX-ST"). You should not unduly rely on such statements. We do not intend, and do not assume any obligation, to update any forward-looking statements to reflect subsequent events or circumstances.

About STATS ChipPAC Ltd.
STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.